Patrick
CanadyPatrick
Canady

Led a multidisciplinary team building an autonomous multi-camera tracking platform for combat sports. Each Raspberry Pi 5 node runs real-time YOLO11n-pose inference on a live feed and drives PCA9685 servo HATs to keep athletes centered in frame, coordinated by a Flask/Socket.IO server over a custom inter-node protocol. Owned hardware design and integration across the full lifecycle, plus the operation and evidence manuals and scholarship-in-practice submission.

Designed a fully synthesizable 3×3 output-stationary systolic MAC array in Verilog with wavefront clock gating and DVFS-style power modes (FULL / HALF / SLEEP) on a Xilinx Zynq UltraScale+. Led the RTL for the activity tracker, clock-gate controller, and mode FSM. Closed timing at 100 MHz (WNS = +6.98 ns) and demonstrated up to 10× lower switching activity versus the ungated baseline, validated across 12 post-implementation power scenarios.

A modular, extensible autograding engine: compiler diagnostics, rubric-driven deduction tracking with scope capping, libclang AST static analysis, automated program I/O testing, and LLM-assisted review (Ollama / qwen3:14b) for subjective criteria. A batch interactive interface adds back-navigation, skip controls, and deduction undo — collapsing 800+ lines of one-off scripting per assignment down to ~150-line rubric files.